Samsung is reportedly working on a new mobile memory package aimed at raising bandwidth and stacking density for future phones and XR devices. According to a report from ETNews, the technology could improve bandwidth by roughly 15% to 30% while increasing stacked capacity by more than 1.5x compared with current approaches.
The new design is described as a Multi Stacked FOWLP solution built on top of Samsung’s existing vertical copper stacking, or VCS, technology. The basic idea is to push more interconnects into the same space by using much taller and narrower copper pillars than conventional mobile DRAM packages use today.
Traditional mobile memory packaging still depends heavily on copper wire bonding, which limits I/O counts to roughly the 128 to 256 range and can come with trade-offs in signal integrity, thermal behavior, and power efficiency. Samsung’s reported approach tries to move past those limits by reshaping the copper pillar structure rather than simply staying within the same old bonding constraints.
More specifically, the report says Samsung wants to increase the aspect ratio of the copper pillars used in VCS packages from roughly 3-to-5:1 today to around 15-to-20:1. In plain terms, that means much slimmer and taller conductive structures, which would make room for more I/O connections and help lift overall memory bandwidth.
That kind of scaling doesn’t come for free. Once copper pillars shrink below about 10 micrometers, they’re more vulnerable to bending or breaking. To address that, Samsung is said to be combining the design with FOWLP processing so the redistributed wiring around the chip package can provide extra structural support for those ultra-fine pillars.
If the engineering works as planned, the payoff could be meaningful. More terminals in the same footprint would allow the mobile memory package to move data faster and stack more capacity without demanding a much larger area. For devices that increasingly run AI workloads on-device, that kind of memory subsystem improvement could matter a lot.
The report points to future smartphones and XR hardware as the most obvious beneficiaries, especially where local AI models need stronger bandwidth and capacity feeding the application processor. Still, no benchmark conditions were disclosed, so the projected gains shouldn’t be treated as guaranteed end-user performance improvements just yet.
Commercial timing also remains unclear. The technology is still said to be under development, with industry observers speculating that it could debut as early as the Exynos 2800 or perhaps the Exynos 2900 generation. For now, the story is best read as an early look at where Samsung may be heading as memory packaging becomes a bigger bottleneck in high-end mobile silicon.
